The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2021

Filed:

Dec. 12, 2018
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Sanghoon Lee, Seongnam-si, KR;

Sunggil Kim, Yongin-si, KR;

Seulye Kim, Seoul, KR;

Hwaeon Shin, Suwon-si, KR;

Joonsuk Lee, Seoul, KR;

Hyeeun Hong, Bucheon-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/11582 (2017.01); H01L 27/1157 (2017.01); H01L 21/02 (2006.01); H01L 29/66 (2006.01); H01L 21/3213 (2006.01); H01L 21/768 (2006.01); H01L 29/10 (2006.01); H01L 27/11556 (2017.01); H01L 27/11519 (2017.01); H01L 27/11524 (2017.01); H01L 27/11565 (2017.01); H01L 21/28 (2006.01);
U.S. Cl.
CPC ...
H01L 27/11582 (2013.01); H01L 21/02532 (2013.01); H01L 21/02592 (2013.01); H01L 21/32135 (2013.01); H01L 21/76802 (2013.01); H01L 21/76877 (2013.01); H01L 27/1157 (2013.01); H01L 27/11519 (2013.01); H01L 27/11524 (2013.01); H01L 27/11556 (2013.01); H01L 27/11565 (2013.01); H01L 29/1037 (2013.01); H01L 29/40114 (2019.08); H01L 29/40117 (2019.08); H01L 29/6653 (2013.01);
Abstract

Disclosed are three-dimensional semiconductor memory devices and methods of fabricating the same. The method includes sequentially forming a sacrificial pattern and a source conductive layer on a substrate, forming a mold structure including a plurality of insulating layers and a plurality of sacrificial layers on the source conductive layer; forming a plurality of vertical structures that penetrate the mold structure, forming a trench that penetrates the mold structure, forming a sacrificial spacer on a sidewall of the trench, removing the sacrificial pattern to form a horizontal recess region; removing the sacrificial spacer, and forming a source conductive pattern that fills the horizontal recess region.


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