The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 26, 2021
Filed:
May. 04, 2018
Applicant:
Sanmina Corporation, San Jose, CA (US);
Inventors:
Paul Batcheller, San Jose, CA (US);
Matthew Bowman, San Jose, CA (US);
Drew G. Doblar, San Jose, CA (US);
Franz Michael Schuette, Colorado Springs, CO (US);
Assignee:
Sanmina Corporation, San Jose, CA (US);
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/14 (2006.01); H05K 1/02 (2006.01); H03K 5/00 (2006.01); H02H 7/20 (2006.01); G06F 1/30 (2006.01); G06F 11/20 (2006.01); G11C 16/22 (2006.01); G11C 5/14 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1415 (2013.01); G06F 1/30 (2013.01); G06F 11/2015 (2013.01); H02H 7/20 (2013.01); H03K 5/00 (2013.01); H05K 1/0293 (2013.01); G06F 2201/86 (2013.01); G11C 5/141 (2013.01); G11C 16/22 (2013.01); H03K 2005/00078 (2013.01); H03K 2005/00195 (2013.01); H05K 2201/10159 (2013.01); H05K 2201/10181 (2013.01);
Abstract
A delay circuitry is configured to hold up power to a mass storage device after a power fault disables communication of the mass storage device with the host computer. The time delay is sufficient to allow saving of in-flight data from the storage device's volatile cache to the non-volatile media (of the storage device) and to update a metadata table in the non-volatile media.