The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 26, 2021

Filed:

Jun. 18, 2019
Applicant:

Sharp Kabushiki Kaisha, Sakai, JP;

Inventors:

Kohei Tanaka, Sakai, JP;

Hidefumi Yoshida, Sakai, JP;

Takeshi Noma, Sakai, JP;

Ryo Yonebayashi, Sakai, JP;

Takayuki Nishiyama, Sakai, JP;

Mitsuhiro Murata, Sakai, JP;

Yosuke Iwata, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/3266 (2016.01); G09G 3/36 (2006.01); G05F 1/46 (2006.01); G02F 1/1362 (2006.01); G02F 1/1368 (2006.01); H03K 17/042 (2006.01); H03K 17/16 (2006.01); H03K 17/687 (2006.01); G02F 1/1333 (2006.01); G02F 1/1335 (2006.01); G02F 1/1345 (2006.01); H01L 27/12 (2006.01); H01L 27/32 (2006.01);
U.S. Cl.
CPC ...
G05F 1/467 (2013.01); G02F 1/1368 (2013.01); G02F 1/13454 (2013.01); G02F 1/133308 (2013.01); G02F 1/133514 (2013.01); G02F 1/136213 (2013.01); G02F 1/136227 (2013.01); G02F 1/136286 (2013.01); G09G 3/3677 (2013.01); H01L 27/124 (2013.01); H01L 27/1255 (2013.01); H03K 17/04206 (2013.01); H03K 17/165 (2013.01); H03K 17/687 (2013.01); G02F 2201/123 (2013.01); G09G 2300/0408 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0251 (2013.01); G09G 2310/0281 (2013.01); G09G 2310/0286 (2013.01); G09G 2320/0223 (2013.01); H01L 27/3272 (2013.01);
Abstract

A technique is provided that reduces dullness of a potential provided to a line such as gate line on an active-matrix substrate to enable driving the line at high speed and, at the same time, reduces the size of the picture frame region. On an active-matrix substrate () are provided gate lines (G) and source lines. On the active-matrix substrate () are further provided: gate drivers () each including a plurality of switching elements, at least one of which is located in a pixel region, for supplying a scan signal to a gate line (G); and lines (L) each for supplying a control signal to the associated gate driver (). A control signal is supplied by a display control circuit () located outside the display region to the gate drivers () via the lines (L). In response to a control signal supplied, each gate driver () drives the gate line (G) to which it is connected.


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