The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10897132 B1

PDF
Full Text
Expired
Date of Patent:
Jan. 19, 2021

Filed:

Sep. 28, 2018
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Bhawna Tomar, Bangalore, IN;

Rohith Aravind Mahale, Bangalore, IN;

Seema Malhotra, Bangalore, IN;

Ajay Kanth Chitturi, Visakhapatnam, IN;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02H 9/04 (2006.01); H01L 27/02 (2006.01);
U.S. Cl.
CPC ...
H02H 9/046 (2013.01); H01L 27/0207 (2013.01); H01L 27/0266 (2013.01);
Abstract

Electrostatic discharge (ESD) protection for an electronic circuit includes a timer circuit that controls multiple clamp circuits. In this way, less circuit area may be used for the timer circuit as compared to conventional ESD protection schemes. In some embodiments, the ESD protection circuit is employed in a data storage apparatus that includes a non-volatile memory array (e.g., NAND devices).


Find Patent Forward Citations

Tomar, Bhawna. (2021). Electrostatic discharge protection circuit and design (U.S. Patent No. 10897132). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10897132

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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