The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 19, 2021
Filed:
May. 02, 2019
Applicant:
Samsung Electronics Co., Ltd., Suwon-si, KR;
Inventors:
Kangmook Lim, Seoul, KR;
Sang Su Kim, Yongin-si, KR;
Woo Seok Park, Ansan-si, KR;
Sung Gi Hur, Hwaseong-si, KR;
Assignee:
SAMSUNG ELECTRONICS CO., LTD., Suwon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/01 (2006.01); H01L 29/06 (2006.01); H01L 21/8238 (2006.01); H01L 29/423 (2006.01); H01L 29/786 (2006.01); H01L 21/762 (2006.01); H01L 29/66 (2006.01); H01L 21/02 (2006.01); H01L 27/092 (2006.01); H01L 29/78 (2006.01);
U.S. Cl.
CPC ...
H01L 29/0649 (2013.01); H01L 21/02532 (2013.01); H01L 21/02603 (2013.01); H01L 21/76237 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/823828 (2013.01); H01L 21/823878 (2013.01); H01L 27/092 (2013.01); H01L 27/0924 (2013.01); H01L 29/0673 (2013.01); H01L 29/42392 (2013.01); H01L 29/66545 (2013.01); H01L 29/66742 (2013.01); H01L 29/66795 (2013.01); H01L 29/7851 (2013.01); H01L 29/78696 (2013.01);
Abstract
A semiconductor device includes a substrate, an active region disposed on the substrate and extending in a first direction, a device isolation layer adjacent to the active region, a gate structure disposed in the active region, the gate structure extending in a second direction crossing the first direction, and covering a portion of the device isolation layer, a gate separation pattern contacting an end of the gate structure, and an impurity region disposed below the gate separation pattern and on the device isolation layer.