The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 2021

Filed:

Jun. 08, 2020
Applicant:

International Test Solutions, Inc., Reno, NV (US);

Inventors:

Alan E. Humphrey, Reno, NV (US);

James H. Duvall, Reno, NV (US);

Jerry Broz, Longmont, CO (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/67 (2006.01); B24B 37/34 (2012.01); B08B 1/00 (2006.01); B08B 1/04 (2006.01); C23C 16/02 (2006.01); G03F 7/20 (2006.01);
U.S. Cl.
CPC ...
H01L 21/67011 (2013.01); B08B 1/001 (2013.01); B08B 1/04 (2013.01); B24B 37/34 (2013.01); C23C 16/0227 (2013.01); G03F 7/70925 (2013.01); H01L 21/67028 (2013.01); Y10T 29/49826 (2015.01);
Abstract

A cleaning wafer or substrate for use in cleaning, or in combination with, components of, for example, integrated chip manufacturing apparatus. The cleaning substrate can include a substrate having varying predetermined surface features, such as one or more predetermined adhesive, non-tacky, electrostatic, projection, depression, or other physical sections. The predetermined features can provide for more effective cleaning of the components with which they are used, such as an integrated chip manufacturing apparatus in the place of the integrated chip wafer. The cleaning substrate can be urged into cleaning or other position by vacuum, mechanical, electrostatic, or other forces. The cleaning substrate can adapted to accomplish a variety of functions, including abrading or polishing. The cleaning substrate may be made by a novel method of making, and it may then be used in a novel method of use I combination with chip manufacturing apparatus.


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