The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 2021

Filed:

Dec. 18, 2018
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Jacob Schmier, Gilbert, AZ (US);

Todd Lindberg, Phoenix, AZ (US);

Robert Ellis, Phoenix, AZ (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/02 (2006.01); G11C 11/56 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G11C 11/5628 (2013.01); G06F 3/0604 (2013.01); G06F 3/0647 (2013.01); G06F 3/0688 (2013.01); G06F 12/0246 (2013.01); G11C 11/5642 (2013.01);
Abstract

A memory system comprises a plurality of memory dies and a controller (or other control circuit) connected to the memory dies. To reduce the time it takes for the memory system to program data and make that programmed data available for reading by a host (or other entity), as well as persistently store the data in a compact manner that efficiently uses space in the memory system, the data is concurrently programmed as single bit per memory cell (fast programming) and multiple bits per memory cell (compact storage). To accomplish this programming strategy, the controller concurrently transfers data to be programmed to a first memory die and a second memory die. The transferred data is programmed in the first memory die at a single bit per memory cell and in the second memory die at multiple bits per memory cell.


Find Patent Forward Citations

Loading…