The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 2021

Filed:

Mar. 27, 2019
Applicant:

Sharp Kabushiki Kaisha, Sakai, JP;

Inventor:

Kaoru Yamamoto, Sakai, JP;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G 3/36 (2006.01); H01L 27/12 (2006.01);
U.S. Cl.
CPC ...
G09G 3/3696 (2013.01); H01L 27/124 (2013.01); H01L 27/1225 (2013.01); G09G 2300/0426 (2013.01); G09G 2310/0297 (2013.01); G09G 2310/08 (2013.01);
Abstract

An active matrix substrate includes a demultiplexer circuit arranged in a peripheral region. Each unit circuit in the demultiplexer circuit includes n switching TFTs. The demultiplexer circuit includes a boost circuit capable of boosting a voltage applied to a gate electrode of the switching TFT. The boost circuit includes a set unit configured to perform a set action, a boost unit configured to perform a boost action, and a reset unit configured to perform a reset action. The set unit includes a setting TFT including a drain electrode connected to the drive signal line and a source electrode connected to a node connected to the gate electrode of the switching TFT. When the set unit performs the set action, a first signal voltage is supplied from the drive signal line to the drain electrode of the setting TFT, and a second signal voltage higher than the first signal voltage is supplied to the gate electrode of the setting TFT.


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