The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 2021

Filed:

Nov. 05, 2018
Applicant:

Xilinx, Inc., San Jose, CA (US);

Inventors:

Ahmad R. Ansari, San Jose, CA (US);

Felix Burton, Foster City, CA (US);

Henry C. Yu, Los Altos, CA (US);

Assignee:

Xilinx, Inc., San Jose, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/00 (2006.01); G06F 11/36 (2006.01); G06F 13/16 (2006.01); G06F 13/40 (2006.01); G06F 13/28 (2006.01); G06F 5/06 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3656 (2013.01); G06F 11/364 (2013.01); G06F 13/1673 (2013.01); G06F 13/28 (2013.01); G06F 13/4022 (2013.01); G06F 13/4027 (2013.01); G06F 5/06 (2013.01);
Abstract

An input-output circuit is coupled to a plurality of serial communication paths and to a physical point-to-point interface. The input-output circuit is configured to transmit data received on the plurality of serial communication paths over the physical point-to-point interface. An application circuit is coupled to the input-output circuit and is configured to communicate via a first one of the paths in performing application functions. A bridge circuit is coupled to the input-output circuit and is configured to communicate via a second one of the paths. A debug circuit is coupled to the application circuit and to the bridge circuit. The debug circuit is configured to capture debug data of the application circuit and provide the debug data to the bridge circuit for communication via the second one of the paths.


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