The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 19, 2021

Filed:

Mar. 29, 2019
Applicant:

International Business Machines Corporation, Armonk, NY (US);

Inventors:

Ophir Erez, Haifa, IL;

Bodo Hoppe, Tamm, DE;

Divya K. Joshi, Bangalore, IN;

Gerrit Koch, Ammerbuch, DE;

Parminder Singh, Bangalore, IN;

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/36 (2006.01); G06F 11/26 (2006.01); G06F 30/33 (2020.01); G06F 11/07 (2006.01);
U.S. Cl.
CPC ...
G06F 11/3636 (2013.01); G06F 11/261 (2013.01); G06F 30/33 (2020.01); G06F 11/0778 (2013.01);
Abstract

Verifying architectural compliance of a processor core using processor-sparing functions. A simulation of a model for a register-transfer level design of the processor core is performed. A first state of the model is dumped, when no error exists. An error is injected in the model. A second state of the model is dumped, after the injected error is detected in the simulation. Upon dumping the second state, the model is reset and initialized with the first state. State information of the second state is loaded in the reset and initialized model.


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