The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2021

Filed:

Feb. 20, 2020
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventors:

Umamaheswara Reddy Katta, Bengaluru, IN;

Tamal Das, Bengaluru, IN;

Assignee:

SAMSUNG ELECTRONICS CO., LTD, Gyeonggi-do, KR;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 9/00 (2006.01); H03K 5/135 (2006.01);
U.S. Cl.
CPC ...
H03M 9/00 (2013.01); H03K 5/135 (2013.01);
Abstract

Various example embodiments relate to unifying a plurality of parallel interfaces. A transmitting apparatus configured to serialize parallel bits implements a dynamic divider circuit for loading varying parallel bits into the transmitting apparatus. An input clock generator is configured to generate a desired and/or predefined clock frequency. The dynamic divider circuit receives the desired and/or predefined clock frequency and generates a parallel clock frequency by dividing the desired and/or predefined clock frequency based on a variable division input. Number of parallel bits loaded into the transmitting apparatus is based on the generated parallel clock frequency. Further, a shift register generates a bit stream from the parallel bits loaded into the shift register and the generated bit stream is converted to serial bit by a multiplexer.


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