The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2021

Filed:

Oct. 31, 2018
Applicant:

Melexis Technologies SA, Bevaix, CH;

Inventors:

Johan Raman, Knesselare, BE;

Pieter Rombouts, Mariakerke, BE;

Assignee:
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03F 3/45 (2006.01); H03F 3/387 (2006.01);
U.S. Cl.
CPC ...
H03F 3/45753 (2013.01); H03F 3/387 (2013.01); H03F 3/45098 (2013.01); H03F 3/45475 (2013.01); H03F 2200/261 (2013.01); H03F 2200/294 (2013.01); H03F 2203/45026 (2013.01); H03F 2203/45138 (2013.01); H03F 2203/45174 (2013.01); H03F 2203/45444 (2013.01);
Abstract

A semiconductor amplifier circuit comprising an input block adapted for receiving a voltage signal to be amplified, an integrator circuit having an integrating capacitor providing a continuous-time signal representative for the integral of the voltage signal, a first feedback path comprising: a sample-and-hold block and a first feedback block, the first feedback path providing a proportional feedback signal upstream of the current integrator. The amplification factor is larger than 1 for a predefined frequency range. Charge stored on the integrating capacitor at the beginning of a sample period is linearly removed during one single sampling period in such a way that the absolute value of the charge is smaller at the end of the sampling period than at the beginning of the sample period when the voltage signal to be amplified is equal to zero.


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