The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2021

Filed:

Feb. 26, 2019
Applicant:

Stmicroelectronics (Crolles 2) Sas, Crolles, FR;

Inventors:

Sonarith Chhun, Pontcharra, FR;

Gregory Imbert, Revel, FR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 27/146 (2006.01); H01L 21/84 (2006.01); H01L 23/48 (2006.01); H01L 21/762 (2006.01); H01L 27/06 (2006.01); H01L 27/12 (2006.01); H01L 21/3065 (2006.01); H01L 23/00 (2006.01); H01L 23/552 (2006.01); H01L 29/94 (2006.01);
U.S. Cl.
CPC ...
H01L 27/1464 (2013.01); H01L 21/3065 (2013.01); H01L 21/76224 (2013.01); H01L 21/84 (2013.01); H01L 23/481 (2013.01); H01L 23/552 (2013.01); H01L 24/00 (2013.01); H01L 24/05 (2013.01); H01L 27/0629 (2013.01); H01L 27/1203 (2013.01); H01L 27/1463 (2013.01); H01L 27/1469 (2013.01); H01L 27/14634 (2013.01); H01L 27/14636 (2013.01); H01L 29/945 (2013.01); H01L 2224/0509 (2013.01); H01L 2224/05087 (2013.01); H01L 2224/05088 (2013.01); H01L 2224/05093 (2013.01); H01L 2224/05166 (2013.01); H01L 2224/05181 (2013.01); H01L 2224/05624 (2013.01); H01L 2225/06541 (2013.01);
Abstract

A semiconductor substrate has a back side surface and a front side surface. Metallization levels are provide at the front side surface. Capacitive deep trench isolation structures extend completely through the semiconductor substrate from the front side surface to the back side surface. Each capacitive deep trench isolation structure includes a conductive region insulated from the semiconductor substrate by an insulating liner. The conductive regions at first ends of the plurality of capacitive deep trench isolation structures are electrically connected to a first metallization level by electrical contacts. A bonding pad structure is located at the back side surface of the semiconductor substrate in direct physical and electrical connection to the conductive regions at second ends of the capacitive deep trench isolation structures.


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