The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 2021
Filed:
Dec. 14, 2018
Methods of fabricating high voltage semiconductor devices having improved electric field suppression
Applicant:
General Electric Company, Schenectady, NY (US);
Inventors:
Stephen Daley Arthur, Glenville, NY (US);
Liangchun Yu, Schenectady, NY (US);
Nancy Cecelia Stoffel, Schenectady, NY (US);
David Richard Esler, Gloversville, NY (US);
Christopher James Kapusta, Delanson, NY (US);
Assignee:
General Electric Company, Schenectady, NY (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/00 (2006.01); H01L 23/60 (2006.01); H01L 29/16 (2006.01); H01L 29/66 (2006.01); H01L 23/00 (2006.01); H01L 29/10 (2006.01); H01L 29/20 (2006.01); H01L 29/778 (2006.01);
U.S. Cl.
CPC ...
H01L 23/60 (2013.01); H01L 24/06 (2013.01); H01L 24/83 (2013.01); H01L 29/1095 (2013.01); H01L 29/1608 (2013.01); H01L 29/2003 (2013.01); H01L 29/66068 (2013.01); H01L 29/7783 (2013.01);
Abstract
Methods of fabricating a semiconductor device are provided. The method includes providing a plurality of semiconductor devices. The method further includes disposing a dielectric dry film on the plurality of semiconductor devices, wherein the dielectric dry film is patterned such that openings in the patterned dielectric dry film are aligned with conductive pads of each of the plurality of semiconductor devices.