The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 12, 2021

Filed:

Apr. 01, 2019
Applicant:

Hitachi High-tech Corporation, Tokyo, JP;

Inventors:

Makoto Miura, Tokyo, JP;

Yohei Ishii, Hillsboro, OR (US);

Satoshi Sakai, Tokyo, JP;

Kenji Maeda, Hillsboro, OR (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 21/02 (2006.01); H01L 29/165 (2006.01); H01L 29/66 (2006.01); H01L 29/78 (2006.01); H01L 29/10 (2006.01); H01L 21/8238 (2006.01); H01L 21/67 (2006.01); H01L 21/3065 (2006.01); H01L 21/033 (2006.01); H01L 27/092 (2006.01);
U.S. Cl.
CPC ...
H01L 21/02532 (2013.01); H01L 21/02381 (2013.01); H01L 21/0337 (2013.01); H01L 21/3065 (2013.01); H01L 21/67069 (2013.01); H01L 21/823807 (2013.01); H01L 21/823821 (2013.01); H01L 21/823878 (2013.01); H01L 27/0924 (2013.01); H01L 29/1054 (2013.01); H01L 29/165 (2013.01); H01L 29/66545 (2013.01); H01L 29/66795 (2013.01); H01L 29/785 (2013.01);
Abstract

A manufacturing process of a semiconductor device including a SiGe channel can form a Si segregation layer for protecting the SiGe channel without damaging the SiGe channel. A manufacturing method of a semiconductor device includes: a first step for performing plasma processing on a semiconductor substrate having a silicon layer and a silicon germanium layer formed on the silicon layer under a first condition to expose the silicon germanium layer; and a second step for performing plasma processing on the semiconductor substrate under a second condition to segregate silicon on the surface of the exposed silicon germanium layer. The silicon germanium layer or layers lying adjacent to the silicon germanium layer can be etched under the first condition, hydrogen plasma processing is performed under the second condition, and the first step and the second step are executed in series in the same processing chamber of a plasma processing apparatus.


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