Semiconductor memory device and refreshing method of semiconductor memory device

Abstract

A semiconductor memory device includes a memory array including a plurality of memory blocks, an address allocation information storage unit which stores address allocation information, a block selection circuit which selects one memory block which corresponds to an input address which is input on the basis of the address allocation information and a refresh control circuit which controls a refreshing operation. One of the memory blocks is allotted to a surplus memory block. The refresh control circuit transfers data which is stored in one memory block which is a refreshing object to the surplus memory block and thereafter allocates address information of the memory block which was the refreshing object to the surplus memory block to which the data is transferred and newly allots the memory block which was the refreshing object to the surplus memory block.