The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Jan. 12, 2021
Filed:
May. 23, 2019
Xilinx, Inc., San Jose, CA (US);
Shail Aditya Gupta, San Jose, CA (US);
Srinivas Beeravolu, Los Gatos, CA (US);
Dinesh K. Monga, Santa Clara, CA (US);
Pradip Jha, Cupertino, CA (US);
Vishal Suthar, Milpitas, CA (US);
Vinod K. Kathail, Palo Alto, CA (US);
Vidhumouli Hunsigida, Hyderabad, IN;
Siddarth Rele, Navi Mumbai, IN;
Xilinx, Inc., San Jose, CA (US);
Abstract
For an application specifying a software portion for implementation within a data processing engine (DPE) array of a device and a hardware portion for implementation within programmable logic (PL) of the device, a logical architecture for the application and a first interface solution specifying a mapping of logical resources to hardware of an interface circuit block between the DPE array and the programmable logic are generated. A block diagram of the hardware portion is built based on the logical architecture and the first interface solution. An implementation flow is performed on the block diagram. The software portion of the application is compiled for implementation in one or more DPEs of the DPE array.