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The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Patent No.:

US 10890620 B1

PDFFull Text
Date of Patent:
Jan. 12, 2021

Filed:

May. 17, 2019

On-chip execution of in-system test utilizing a generalized test image

Applicant:

Nvidia Corp., Santa Clara, CA (US);

Inventors:

Milind Bhaiyyasaheb Sonawane, San Jose, CA (US);

Shantanu K. Sarangi, Saratoga, CA (US);

Sailendra Chadalavada, Saratoga, CA (US);

Sumit Raj, Bangalore, IN;

Rangavajjula Kameswara Naga Mahesh, Narasaraopet, IN;

Jayesh Kumar Pandey, San Jose, CA (US);

Venkat Abilash Reddy Nerallapally, San Jose, CA (US);

Assignee:

NVIDIA Corp., Santa Clara, CA (US);

Attorney:

Rowan TELS LLC

Primary Examiner:

Samir W Rizk

Int. Cl.
CPC ...
G01R 31/28 (2006.01); G01R 31/3177 (2006.01);
U.S. Cl.
CPC ...
G01R 31/3177 (2013.01);
Abstract

Systems and methods enable the updating of tests, test sequences, fault models, and test conditions such as voltage and clock frequencies, over the life cycle of a safety critical application for complex integrated circuits and systems.

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Sonawane, Milind. (2021). On-chip execution of in-system test utilizing a generalized test image (U.S. Patent No. 10890620). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10890620

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