The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Oct. 27, 2014
Applicant:

Hewlett Packard Enterprise Development Lp, Houston, TX (US);

Inventor:

Terrel L Morris, Garland, TX (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 5/00 (2006.01); H05K 1/18 (2006.01); H05K 7/14 (2006.01); H05K 1/11 (2006.01); H05K 7/02 (2006.01); H05K 7/00 (2006.01);
U.S. Cl.
CPC ...
H05K 7/1459 (2013.01); H05K 1/117 (2013.01); H05K 1/181 (2013.01); H05K 7/023 (2013.01); H05K 7/1427 (2013.01); H05K 7/1451 (2013.01); H05K 7/1452 (2013.01); H01L 2924/0002 (2013.01);
Abstract

A network packaging system can include a circuit board that includes a chip located substantially in a center of the board. A backplane is in communication with the chip and located along on a first edge of the circuit board. A plurality of connector ports are arranged along the perimeter of at least two other edges of the circuit board. A plurality of traces connects the plurality of connector ports to the chip. A support structure houses one or more circuit boards, with at least two sidewall surfaces of the support structure extending substantially orthogonal to and coextensive with each of the at least two edges of the circuit board. The support structure includes a plurality of apertures extending through the one or more surfaces spatially aligned with each of the plurality of connector ports.


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