The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Jun. 11, 2019
Applicant:

Accedian Networks Inc., Saint-Laurent, CA;

Inventors:

Claude Robitaille, St-Placide, CA;

Steve Rochon, Brossard, CA;

Yanick Viens, St-Jean-sur-Richelieu, CA;

Assignee:

Accedian Networks Inc., Saint-Laurent, CA;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04J 3/06 (2006.01); H04L 12/403 (2006.01); H04L 12/40 (2006.01);
U.S. Cl.
CPC ...
H04J 3/0658 (2013.01); H04J 3/0641 (2013.01); H04L 12/40 (2013.01); H04L 12/403 (2013.01);
Abstract

A method of simplifying the implementation of Synchronous Ethernet on an Ethernet device having a first port and a second port device using a predetermined protocol and signaling, comprises delivering a master clock from a Synchronous Ethernet system to the first port of the Ethernet device; transmitting the delivered master clock to the second port of the Ethernet device independently of the protocol and signaling of the Ethernet device; and transmitting the master clock from the second port of the Ethernet device to a downstream device that supports Synchronous Ethernet. In one implementation, the Ethernet device has a local clock, and the method synchronizes the local clock to the master clock. In another implementation, the Ethernet device does not have a local clock, and the master clock is transmitted from the second port of the Ethernet device to the downstream device without any synchronizing operation at the Ethernet device.


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