Multi-chip stacked devices

Abstract

Examples described herein generally relate to multi-chip devices having stacked chips. In an example, a multi-chip device includes a chip stack including a base chip and two or more overlying chips overlying the base chip. Neighboring chips of the chip stack are connected to each other. The chip stack includes identification generation connections and circuits configured to generate a unique identification of each overlying chip based on a relative position of the respective overlying chip with reference to the base chip. The chip stack includes a communication channel from the base chip to each overlying chip. Each overlying chip includes comparison and enable/disable logic (CEDL) communicatively coupled to the communication channel. The CEDL is configured to compare a target identification of data received by the respective overlying chip to the unique identification of the respective overlying chip and responsively enable or disable a recipient circuit of the respective overlying chip.