The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Apr. 16, 2019
Applicant:

Cray Inc., Seattle, WA (US);

Inventors:

Laurence S. Kaplan, Shoreline, WA (US);

Preston Pengra Briggs, III, Seattle, WA (US);

Miles Arthur Ohlrich, Seattle, WA (US);

Willard Huston Leslie, Issaquah, WA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 11/10 (2006.01); G06F 11/14 (2006.01); G06F 11/20 (2006.01); G06F 3/06 (2006.01); G06F 11/16 (2006.01); G06F 11/08 (2006.01);
U.S. Cl.
CPC ...
G06F 11/1076 (2013.01); G06F 3/064 (2013.01); G06F 3/067 (2013.01); G06F 3/0619 (2013.01); G06F 3/0673 (2013.01); G06F 11/1004 (2013.01); G06F 11/1088 (2013.01); G06F 11/141 (2013.01); G06F 11/1662 (2013.01); G06F 11/2023 (2013.01); G06F 11/08 (2013.01); G06F 11/10 (2013.01); G06F 11/1008 (2013.01); G06F 11/1016 (2013.01); G06F 11/1068 (2013.01); G06F 11/14 (2013.01); G06F 11/1402 (2013.01); G06F 11/1405 (2013.01); G06F 11/1479 (2013.01); G06F 11/202 (2013.01); G06F 11/2035 (2013.01); G06F 2201/805 (2013.01); G06F 2201/82 (2013.01);
Abstract

A resiliency system detects and corrects memory errors reported by a memory system of a computing system using previously stored error correction information. When a program stores data into a memory location, the resiliency system executing on the computing system generates and stores error correction information. When the program then executes a load instruction to retrieve the data from the memory location, the load instruction completes normally if there is no memory error. If, however, there is a memory error, the computing system passes control to the resiliency system (e.g., via a trap) to handle the memory error. The resiliency system retrieves the error correction information for the memory location and re-creates the data of the memory location. The resiliency system stores the data as if the load instruction had completed normally and passes control to the next instruction of the program.


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