The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Jul. 25, 2019
Applicant:

Pismo Labs Technology Limited, Kowloon, HK;

Inventors:

Ming Pui Chong, Kowloon, HK;

Tik Yan Wong, Kowloon, HK;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 1/3203 (2019.01); G06F 1/26 (2006.01); H04L 12/10 (2006.01);
U.S. Cl.
CPC ...
G06F 1/263 (2013.01); G06F 1/266 (2013.01); H04L 12/10 (2013.01);
Abstract

Methods and systems for supplying more power than a power limit to a powered device (PD) if the PD is capable of receiving power more than the power limit, and receiving power more than the power limit from a power sourcing equipment (PSE) if the PSE is capable of supplying power more than the power limit. The PD and the PSE operates in a power over Ethernet (PoE) environment. The system comprises a power receiving section and a power supply section. The power receiving section comprises a first power-receiving circuit and a second power-receiving circuit, where the first power-receiving circuit is used when receiving power up to the power limit, and the second power-receiving circuit is used when receiving power more than the power limit. The power-supply section comprises a first power-supply circuit and a second power-supply circuit, where the first power-supply circuit is used when supplying power up to the power limit, and the second power-supply circuit is used when supplying power more than the power limit.


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