The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Jan. 05, 2021

Filed:

Oct. 08, 2019
Applicant:

Renesas Electronics Corporation, Tokyo, JP;

Inventors:

Kazuki Fukuoka, Tokyo, JP;

Toshifumi Uemura, Tokyo, JP;

Yuko Kitaji, Tokyo, JP;

Yosuke Okazaki, Tokyo, JP;

Akira Murayama, Tokyo, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G01R 27/26 (2006.01); G01R 19/165 (2006.01); G01R 31/28 (2006.01); G06F 1/28 (2006.01); H03K 5/133 (2014.01); H03K 3/03 (2006.01); G06F 1/24 (2006.01); G01R 31/317 (2006.01); G01R 31/3177 (2006.01); G01R 31/3183 (2006.01); G01R 31/3193 (2006.01);
U.S. Cl.
CPC ...
G01R 19/16552 (2013.01); G01R 31/2851 (2013.01); G01R 31/3177 (2013.01); G01R 31/31703 (2013.01); G01R 31/31932 (2013.01); G01R 31/31937 (2013.01); G01R 31/318328 (2013.01); G06F 1/24 (2013.01); G06F 1/28 (2013.01); H03K 3/0315 (2013.01); H03K 5/133 (2013.01);
Abstract

A semiconductor device, a semiconductor system, and a control method of a semiconductor device are capable of accurately monitoring the lowest operating voltage of a circuit to be monitored. According to one embodiment, a monitor unit of a semiconductor system includes a voltage monitor that is driven by a second power supply voltage different from a first power supply voltage supplied to an internal circuit that is a circuit to be monitored and monitors the first power supply voltage, and a delay monitor that is driven by the first power supply voltage and monitors the signal propagation period of time of a critical path in the internal circuit.


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