The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Jul. 26, 2019
Applicant:

Advanced Connectek Inc., New Taipei, TW;

Inventors:

Min-Lung Chien, New Taipei, TW;

Mao-Sheng Chen, New Taipei, TW;

Wen-Yu Wang, New Taipei, TW;

Assignee:

Advanced Connectek Inc., New Taipei, TW;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K 1/11 (2006.01); H05K 1/02 (2006.01);
U.S. Cl.
CPC ...
H05K 1/0245 (2013.01); H05K 1/0219 (2013.01); H05K 1/0228 (2013.01); H05K 1/115 (2013.01); H05K 1/116 (2013.01); H05K 2201/09227 (2013.01); H05K 2201/10189 (2013.01);
Abstract

A circuit board structure including a dielectric substrate having a plurality of vias, a first conductor layer, a second conductor layer, an insulating layer, and a third conductor layer. The first and the second conductor layers are disposed at opposite surfaces of the dielectric substrate. The first conductor layer forms a plurality of traces including at least one high-speed differential pair and a plurality of ground traces, wherein the vias are located on the ground traces. The electric insulated layer is disposed on the dielectric substrate and covers the first conductor layer, and the third conductor layer is disposed on the insulating layer.


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