The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Feb. 13, 2019
Applicant:

Infineon Technologies Ag, Neubiberg, DE;

Inventors:

Rainer Goettfert, Putzbrunn, DE;

Bernd Meyer, Munich, DE;

Assignee:

Infineon Technologies AG, Neubiberg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/00 (2006.01); H03M 13/15 (2006.01);
U.S. Cl.
CPC ...
H03M 13/152 (2013.01); H03M 13/15 (2013.01); H03M 13/1545 (2013.01); H03M 13/1575 (2013.01); H03M 13/6502 (2013.01);
Abstract

An integrated circuit includes a receiver configured to receive a message word and an integrated hardware decoding circuit. The decoding circuit includes a calculation unit to calculate a syndrome of the message word according to a predetermined BCH code, a logarithmization unit to establish a logarithm of each of one or more syndrome components, an arithmetic circuit to establish a logarithm of each of one or more zeros of the error locator polynomial of the BCH code on the basis of the logarithms of the syndrome components, and a bit inverter circuit to invert the one or more bits of the message word, the positions of which are specified by the logarithms of the zeros of the error locator polynomial. The integrated circuit further includes a data processing circuit to process further the message word processed by the bit inverter circuit.


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