The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Apr. 19, 2017
Applicant:

Amlogic (Shanghai) Co., Ltd., Shanghai, CN;

Inventors:

Xiaotong Liu, Shanghai, CN;

Xiao Zhang, Shanghai, CN;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 13/11 (2006.01); H03M 13/00 (2006.01); H03M 7/00 (2006.01);
U.S. Cl.
CPC ...
H03M 13/1131 (2013.01); H03M 7/00 (2013.01); H03M 13/112 (2013.01); H03M 13/114 (2013.01); H03M 13/116 (2013.01); H03M 13/1122 (2013.01); H03M 13/1128 (2013.01); H03M 13/1137 (2013.01); H03M 13/1185 (2013.01); H03M 13/1188 (2013.01); H03M 13/658 (2013.01); H03M 13/6588 (2013.01);
Abstract

The invention relates to the field of decoders, more specifically, to a decoding method of LDPC (Low Density Parity Check Code). The decoding method comprising: in the rwsr (Row-Wise Scanning Round) phase, the recovery circuit reads a plurality of sign bits, the absolute value of a minimum value, the absolute value of a second smallest value and the absolute value of a third smallest value which are stored previously, and they are output by a comparison and a selector, the output of the comparator and selector is shifted, and then is combined with each sign bit to obtain an update message of the previous check node, the update message is subtracted from the posterior probability by the addition circuit to obtain an input of the update unit.


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