The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 29, 2020
Filed:
Oct. 17, 2019
Qualcomm Incorporated, San Diego, CA (US);
George Shing, San Diego, CA (US);
Michael Fertsch, Oceanside, CA (US);
QUALCOMM Incorporated, San Diego, CA (US);
Abstract
In certain aspects, a delay circuit includes a delay line including a bias input. The delay circuit also includes a bias generator including a clock input, and a bias output, wherein the bias output of the bias generator is coupled to the bias input of the delay line. The delay circuit further includes a multiplexer including a first input, a second input, and an output, wherein the first input of the multiplexer is configured to receive a first clock signal, the second input of the multiplexer is configured to receive a second clock signal, and the output of the multiplexer is coupled to the clock input of the bias generator.