The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Aug. 06, 2019
Applicant:

Samsung Electronics Co., Ltd., Suwon-si, KR;

Inventor:

Jae Min Jung, Hwaseong-si, KR;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/00 (2006.01); H01L 23/498 (2006.01); H01L 21/00 (2006.01); H01L 21/768 (2006.01); H01L 21/02 (2006.01);
U.S. Cl.
CPC ...
H01L 24/32 (2013.01); H01L 21/76801 (2013.01); H01L 21/76865 (2013.01); H01L 23/49838 (2013.01); H01L 24/73 (2013.01); H01L 21/02354 (2013.01); H01L 2224/26175 (2013.01); H01L 2224/73203 (2013.01);
Abstract

A chip-on-film includes an insulating film including a bonding region for bonding to an external device, a plurality of interconnections disposed on the insulating film and partially extending into the bonding region, and an integrated circuit (IC) chip disposed on the insulating film so as to be electrically connected to the plurality of interconnections. The chip-on-film further includes a solder resist disposed so as to cover the insulating film excluding the bonding region and so as to cover the plurality of interconnections excluding portions extending into the bonding region, and a stepped portion located between the bonding region and the solder resist. The stepped portion forms a boundary against a flow of the solder resist into the bonding region.


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