The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

May. 09, 2018
Applicant:

Stmicroelectronics S.r.l., Agrate Brianza, IT;

Inventors:

Federico Giovanni Ziglioli, Pozzo d'Adda, IT;

Pierangelo Magni, Villasanta, IT;

Assignee:

STMICROELECTRONICS S.R.L., Agrate Brianza, IT;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/31 (2006.01); H01L 21/48 (2006.01); H01L 21/56 (2006.01); H01L 23/498 (2006.01); H01L 23/00 (2006.01); H01L 23/538 (2006.01);
U.S. Cl.
CPC ...
H01L 23/3114 (2013.01); H01L 21/4846 (2013.01); H01L 21/4867 (2013.01); H01L 21/568 (2013.01); H01L 23/49861 (2013.01); H01L 23/49883 (2013.01); H01L 23/5389 (2013.01); H01L 24/19 (2013.01); H01L 24/20 (2013.01); H01L 24/96 (2013.01); H01L 24/97 (2013.01); H01L 21/561 (2013.01); H01L 23/3135 (2013.01); H01L 2224/04105 (2013.01); H01L 2224/12105 (2013.01); H01L 2224/16145 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48145 (2013.01); H01L 2224/73209 (2013.01); H01L 2224/73227 (2013.01); H01L 2224/73253 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/73267 (2013.01); H01L 2224/92244 (2013.01); H01L 2924/1815 (2013.01); H01L 2924/18162 (2013.01);
Abstract

A method of manufacturing semiconductor devices includes providing one or more semiconductor chips having a surface with electrical contact pads and a package mass encapsulating the semiconductor chip. The package mass includes a recessed portion leaving the semiconductor chip surface with the contact pads exposed, the recessed portion having a peripheral wall extending from the surface of the semiconductor chip to the outer surface of the package mass. Electrically-conductive formations are provided extending over the peripheral wall of the recessed portion with proximal ends electrically coupled with the contact pads of the semiconductor chip and distal ends at the outer surface of the package mass. The recessed portion is filled with a further package mass by leaving the distal ends of the electrically-conductive formations uncovered.


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