The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 29, 2020

Filed:

Nov. 28, 2017
Applicant:

Maxlinear, Inc., Carlsbad, CA (US);

Inventors:

Qiming Wu, Singapore, SG;

Jiaxiang Shi, Singapore, SG;

Assignee:

MaxLinear, Inc., Carlsbad, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 21/57 (2013.01); G06F 9/30 (2018.01); G06F 11/07 (2006.01); G06F 9/4401 (2018.01);
U.S. Cl.
CPC ...
G06F 21/575 (2013.01); G06F 9/30098 (2013.01); G06F 9/4401 (2013.01); G06F 11/0772 (2013.01);
Abstract

Anti-fault injection systems and methods are disclosed. An anti-fault injection system includes a processor; a boot ROM configured to store a series of boot instructions executable by the processor; and anti-fault injection controller circuitry. The anti-fault injection controller circuitry is accessible to the processor while the processor is executing the boot instructions. The anti-fault injection controller circuitry includes interrupt/reset circuitry configured to interrupt the processor in response to a trigger and secure boot circuitry. The secure boot circuitry is configured to, in response to being accessed by the processor: determine whether the processor is executing non-secure boot instructions in error; and in response to detecting that the processor is executing non-secure boot instructions in error, provide the trigger to the interrupt/reset circuitry.


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