The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 22, 2020

Filed:

Feb. 19, 2020
Applicant:

Analog Devices, Inc., Norwood, MA (US);

Inventors:

Ahmed Mohamed Abdelatty Ali, Oak Ridge, NC (US);

Frank Murden, Roan Mountain, TN (US);

Peter Delos, Greensboro, NC (US);

Ralph D. Moore, Greensboro, NC (US);

Assignee:

ANALOG DEVICES, INC., Norwood, MA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M 1/10 (2006.01); H03M 1/00 (2006.01); H03M 1/06 (2006.01); H03H 7/42 (2006.01); H03M 1/12 (2006.01);
U.S. Cl.
CPC ...
H03M 1/002 (2013.01); H03H 7/42 (2013.01); H03M 1/0639 (2013.01); H03M 1/1009 (2013.01); H03M 1/1215 (2013.01);
Abstract

Improved track and hold (T/H) circuits can help analog-to-digital converters (ADCs) achieve higher performance and lower power consumption. The improved T/H circuits can drive high speed and interleaved ADCs, and the design of the circuits enable additive and multiplicative pseudo-random dither signals to be injected in the T/H circuits. The dither signals can be used to calibrate (e.g., linearize) the T/H circuits and the ADC(s). In addition, the dither signal can be used to dither any remaining non-linearity, and to calibrate offset/gain mismatches in interleaved ADCs. The T/H circuit design also can integrate an amplifier in the T/H circuit, which can be used to improve the signal-to-noise ratio (SNR) of the ADC or to act as a variable gain amplifier (VGA) in front of the ADC.


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