The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 22, 2020

Filed:

Jun. 27, 2019
Applicant:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Inventors:

Russell Schreiber, Austin, TX (US);

Keith A. Kasprak, Austin, TX (US);

Assignee:

Advanced Micro Devices, Inc., Santa Clara, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C 7/06 (2006.01); G11C 11/412 (2006.01); G11C 11/419 (2006.01); H01L 27/11 (2006.01);
U.S. Cl.
CPC ...
G11C 7/06 (2013.01); G11C 11/412 (2013.01); G11C 11/419 (2013.01); H01L 27/1104 (2013.01);
Abstract

A circuit includes a repeating series of first circuits and a repeating series of second circuits placed next to the repeating series of first circuits and interacts with corresponding portions of the first circuits in the series. The repeating series of second circuits is formed in diffusion regions and diffusion wells which extend along the direction in which the second circuits repeat. The repeating series of the first and second circuits is interrupted by at least one dummy circuit region, which occupies the space of one or more instances of the first and second repeating series. The dummy circuit region also includes taps for biasing the diffusion regions and diffusion wells of the second circuits.


Find Patent Forward Citations

Schreiber, Russell. (2020). Nwell and subtrate taps in memory layout (U.S. Patent No. 10872641). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/10872641

Data source: USPTO (United States Patent and Trademark Office) public patent records. Weekly synchronization. How IDiyas builds this profile

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