The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2020

Filed:

Mar. 23, 2020
Applicant:

Cypress Semiconductor Corporation, San Jose, CA (US);

Inventors:

Hans Van Antwerpen, Mountain View, CA (US);

Cliff Zitlaw, San Jose, CA (US);

Stephan Rosner, Campbell, CA (US);

Yoav Yogev, Mazkeret Batya, IL;

Sandeep Krishnegowda, Santa Clara, CA (US);

Steven Wilson, Fremont, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H04L 9/32 (2006.01); G06F 3/06 (2006.01); G06F 21/60 (2013.01);
U.S. Cl.
CPC ...
H04L 9/3273 (2013.01); G06F 3/0622 (2013.01); G06F 3/0637 (2013.01); G06F 3/0679 (2013.01); G06F 21/602 (2013.01); H04L 9/3242 (2013.01);
Abstract

A device can include a plurality of regions, each region including a plurality of nonvolatile memory cells: a permission store configured to store a set of permission values, including at least one permission value for each region in a nonvolatile fashion; and access control circuits configured to control access to each region according to the permission value for the region, including one or more of requiring authentication to access the region, encrypting data read from the region, and decrypting data for storage in the region. Related methods and systems are also disclosed.


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