The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 2020
Filed:
Apr. 08, 2020
Applicant:
Stc.unm, Albuquerque, NM (US);
Inventors:
James Plusquellic, Albuquerque, NM (US);
James Aarestad, Albuquerque, NM (US);
Assignee:
STC.UNM, Albuquerque, NM (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 19/003 (2006.01); H03K 19/21 (2006.01); H04L 9/08 (2006.01); H03K 23/00 (2006.01); H04L 9/06 (2006.01); H03K 3/84 (2006.01);
U.S. Cl.
CPC ...
H03K 19/00323 (2013.01); H03K 3/84 (2013.01); H03K 19/00315 (2013.01); H03K 19/215 (2013.01); H03K 23/004 (2013.01); H04L 9/0662 (2013.01); H04L 9/0866 (2013.01);
Abstract
A Hardware-Embedded Delay PUF (HELP) leverages entropy by monitoring path stability and measuring path delays from core logic macros. HELP incorporates techniques to deal with bias. A unique feature of HELP is that it may compare data measured from different test structures. HELP may be implemented in existing FPGA platforms. HELP may leverage both path stability and within-die variations as sources of entropy.