The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2020

Filed:

Feb. 23, 2017
Applicant:

Osram Opto Semiconductors Gmbh, Regensburg, DE;

Inventors:

Choon Kim Lim, Penang, MY;

Choo Kean Lim, Penang, MY;

Jeok Pheng Go, Penang, MY;

Assignee:

OSRAM OLED GMBH, Regensburg, DE;

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 31/16 (2006.01); H01L 31/02 (2006.01); H01L 31/0203 (2014.01); H01L 31/167 (2006.01); H01L 25/16 (2006.01); H01L 25/18 (2006.01); H01L 33/48 (2010.01); H01L 31/09 (2006.01);
U.S. Cl.
CPC ...
H01L 31/16 (2013.01); H01L 25/162 (2013.01); H01L 25/18 (2013.01); H01L 31/0203 (2013.01); H01L 31/02019 (2013.01); H01L 31/09 (2013.01); H01L 31/167 (2013.01); H01L 33/486 (2013.01); H01L 2924/15153 (2013.01); H01L 2924/1632 (2013.01); H01L 2924/16251 (2013.01); H01L 2924/16315 (2013.01);
Abstract

A sensor element is disclosed. In an embodiment a sensor element includes a substrate, a light emitting semiconductor chip arranged with a mounting face on a mounting face of the substrate, wherein the semiconductor chip has a smaller mounting face than the substrate, wherein a border area of the mounting face of the substrate circumvents the semiconductor chip, wherein on a bottom side of the semiconductor chip electrical contacts are arranged, and wherein the substrate is transparent for radiation of the semiconductor chip, a carrier, wherein the bottom side of the semiconductor chip is arranged on a mounting face of the carrier, wherein the carrier includes further electrical contacts on the mounting face, and wherein the contacts of the semiconductor chip and the further contacts of the carrier are connected, a sealing member arranged between the mounting face of the carrier and the border area of the substrate, wherein the sealing member seals a sealing area between the substrate and the carrier, wherein a recess is arranged in the mounting face of the carrier, and an optical sensor arranged in the recess.


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