The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2020

Filed:

Apr. 23, 2019
Applicant:

Navitas Semiconductor, Inc., El Segundo, CA (US);

Inventors:

Pil Sung Park, Los Angeles, CA (US);

Maher J. Hamdan, Lake Forest, CA (US);

Santosh Sharma, Laguna Niguel, CA (US);

Daniel M. Kinzer, El Segundo, CA (US);

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 29/778 (2006.01); H01L 29/423 (2006.01); H01L 29/78 (2006.01); H01L 29/40 (2006.01); H01L 29/06 (2006.01); H01L 29/205 (2006.01); H01L 29/20 (2006.01);
U.S. Cl.
CPC ...
H01L 29/7787 (2013.01); H01L 29/0696 (2013.01); H01L 29/2003 (2013.01); H01L 29/205 (2013.01); H01L 29/404 (2013.01); H01L 29/42356 (2013.01); H01L 29/7786 (2013.01); H01L 29/7832 (2013.01);
Abstract

A gallium nitride transistor includes a substrate on which a source region, a drain region, a drift region and a gate region are defined. The drift region extends between the source region and the drain region. The gate region includes a combination of enhancement-mode and depletion-mode devices that are positioned across the drift region and are used together to control charge density and mobility of electrons in the drift region with a relatively low threshold voltage (V). Enhancement-mode devices are formed using a P-type layer disposed on the substrate and coupled to a gate electrode.


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