The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 2020
Filed:
Jun. 14, 2019
Mitsubishi Electric Corporation, Tokyo, JP;
Hajime Akiyama, Tokyo, JP;
Manabu Yoshino, Tokyo, JP;
Mitsubishi Electric Corporation, Tokyo, JP;
Abstract
The object of the present invention is to increase the breakdown voltage without thickening an SOI layer in a wafer-bonded dielectric isolated structure. A device region of a SiC-SOI device includes: a first trench continuously or intermittently surrounding an ntype drift region and not penetrating a SiC substrate; an ntype side surface diffusion region formed on each side surface of the first trench; an ntype bottom diffusion region formed under the ntype drift region and in contact with the ntype side surface diffusion region; and a plurality of thin insulating films formed in proximity to a surface of the ntype drift region at regular spacings of 0.4 μm or less. A surrounding region includes a second trench formed to continuously surround the first trench and penetrating the SiC substrate, and an isolated insulating film region formed on each side surface of the second trench.