The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 2020
Filed:
Oct. 23, 2018
Applicant:
SK Hynix Inc., Icheon-si, Gyeonggi-do, KR;
Inventor:
Jin Ho Baek, Icheon-si, KR;
Assignee:
SK hynix Inc., Icheon-si, KR;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 23/34 (2006.01); H01L 23/367 (2006.01); H01L 23/528 (2006.01); H01L 25/065 (2006.01); H01L 25/10 (2006.01); H05K 1/18 (2006.01); H01L 23/00 (2006.01); H01L 21/82 (2006.01);
U.S. Cl.
CPC ...
H01L 24/09 (2013.01); H01L 21/82 (2013.01); H01L 23/367 (2013.01); H01L 24/17 (2013.01); H05K 1/184 (2013.01); H01L 2224/02371 (2013.01);
Abstract
A multi-chip package may include a plurality of semiconductor chips and a printed circuit board (PCB). Each of the semiconductor chips may have an upper surface, a bottom surface, and a plurality of side surfaces. Circuit terminals may be arranged on the upper surface. A plurality of side bonding pads may be arranged on one or more selected side surface among the side surfaces. The semiconductor chips may be mounted on the PCB. The PCB may be configured to surround the selected side surface on which the side bonding pads may be arranged.