The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2020

Filed:

Sep. 07, 2019
Applicant:

Terarecon, Inc., Foster City, CA (US);

Inventors:

Jeffrey L. Sorenson, Wake Forest, NC (US);

David W. MacCutcheon, Marshfield, MA (US);

Tiecheng Zhao, Concord, CA (US);

Gael Kuhn, Montreuil, FR;

Assignee:

TERARECON, INC., Foster City, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
A61B 8/00 (2006.01); G06F 19/00 (2018.01); G16H 50/20 (2018.01); G16H 30/40 (2018.01); G16H 30/20 (2018.01); G16H 15/00 (2018.01); G16H 50/70 (2018.01); A61B 5/055 (2006.01); G06N 5/04 (2006.01); A61B 5/00 (2006.01); G06N 5/02 (2006.01); G06T 7/00 (2017.01);
U.S. Cl.
CPC ...
G06F 19/321 (2013.01); A61B 8/565 (2013.01); G16H 15/00 (2018.01); G16H 30/20 (2018.01); G16H 30/40 (2018.01); G16H 50/20 (2018.01); G16H 50/70 (2018.01); A61B 5/0013 (2013.01); A61B 5/055 (2013.01); A61B 2576/00 (2013.01); G06N 5/022 (2013.01); G06N 5/045 (2013.01); G06T 7/0012 (2013.01); G06T 2207/10116 (2013.01);
Abstract

A plurality of image processing engines are hosted within an image processing system. Each image processing engine performs one or more image processing operations or clinical content processing operations on medical images and clinical content. A user interface allows a user to configure the plurality of image processing engines for a particular study of images. The user interface allows the user to configure the plurality of image processing engines in any one of the following configurations: a series configuration where the image processing engines operate in series so that an output from one image processing engine serves as input to a next image processing engine; a parallel configuration where each image processing engine in the plurality of image processing engines operates without input from any other image processing engine in the plurality of image processing engines; or a a hybrid configuration where a first subset of image processing engines operate in a series configuration, and a second subset of image processing engines operate in a parallel configuration.


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