The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 15, 2020

Filed:

Oct. 01, 2018
Applicant:

Western Digital Technologies, Inc., San Jose, CA (US);

Inventors:

Shay Benisty, Beer Sheva, IL;

Ariel Navon, Revava, IL;

Alex Bazarsky, Holon, IL;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F 12/00 (2006.01); G06F 13/00 (2006.01); G06F 3/06 (2006.01);
U.S. Cl.
CPC ...
G06F 3/0613 (2013.01); G06F 3/0658 (2013.01); G06F 3/0659 (2013.01); G06F 3/0688 (2013.01);
Abstract

Systems and methods for managing performance and quality of service (QoS) with multiple namespace resource allocation. NVM Express (NVMe) implements a paired submission queue and completion queue mechanism, with host software on the host device placing commands into the submission queue. The memory device processes the commands through various phases including fetching, processing, posting a completion message, and sending an interrupt to the host. NVMe may support the use of namespaces. Namespace configuration may be modified to include performance criteria specific to each namespace. The memory device may then receive commands directed to specific namespaces an apply memory device resources to commands in each namespace queue such that QoS may be applied to control execution of commands such that commands in each namespace receive resources based on host selected performance parameters for each namespace.


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