The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 15, 2020
Filed:
May. 22, 2018
Beijing Smartchip Microelectronics Technology Company Limited, Beijing, CN;
State Grid Information & Telecommunication Group Co., Ltd., Beijing, CN;
State Grid Corporation of China, Beijing, CN;
Dongyan Zhao, Beijing, CN;
Xiaoke Tang, Beijing, CN;
Xiaoman Wang, Beijing, CN;
Dejian Li, Beijing, CN;
Haifeng Zhang, Beijing, CN;
Yi Hu, Beijing, CN;
Lixin Yang, Beijing, CN;
Yidong Yuan, Beijing, CN;
Lang Tan, Beijing, CN;
Yongwang Ma, Beijing, CN;
Jiali Hou, Beijing, CN;
Beijing Smartchip Microelectronics Technology Comp, Beijing, CN;
Abstract
An ultra-low power consumption power supply structure, comprising: a first LDO circuit, a second LDO circuit, a first Bandgap module, a second Bandgap module and a switching circuit, wherein the first LDO circuit is used for providing an LDO output voltage when an SOC chip is in a normal operating mode, and the second LDO circuit is used for providing an LDO output voltage when the SOC chip is in an ultra-low power consumption mode; the first Bandgap module is used for providing, based on a main power supply voltage, a first reference voltage for the first LDO circuit at the time of power-on startup, and the second Bandgap module is used for providing a second reference voltage for the second LDO circuit after power-on startup is completed; and the switching circuit is used for switching the mode in which the first reference voltage is output by the first Bandgap module at the time of power-on startup to the mode in which the second reference voltage is output by the second Bandgap module after power-on startup is completed.