Successive approximation analog-to-digital converter and operation method thereof

Abstract

A successive approximation analog-to-digital converter (SAR ADC) and an operation method thereof are provided. The SAR ADC, which alternately operates in a sampling phase and a comparison and switching phase, includes a switch-capacitor digital-to-analog converter (DAC), a comparator, a successive approximation register and a control circuit. The switch-capacitor DAC including multiple capacitors. The control circuit is configured to (A) control a top plate of a first capacitor and a top plate of a second capacitor to be coupled to an analog input signal during the sampling phase; (B) control the first capacitor and the second capacitor to be active and inactive, respectively, in the comparison and switching phase according to a reference code after the sampling phase finishes; and (C) switch a terminal voltage of at least one of the capacitors during the comparison and switching phase according to the comparison results of the comparator.