The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2020
Filed:
Jul. 30, 2019
Xilinx, Inc., San Jose, CA (US);
Pedro W. Neto, Douglas, IE;
XILINX, INC., San Jose, CA (US);
Abstract
Apparatus and associated methods relate to a logic circuit having a number of unit circuits performing buffering and data storage functionalities in parallel. In an illustrative example, a logic circuit may include N unit circuits for data storage and N−1 unit circuits for buffering. During a conversion cycle, only an iunit circuit of the N unit circuits and an (i−1)unit circuit of the N−1 unit circuits may be enabled. Output status of the iunit circuit of the N unit circuits may be monitored to disable the iunit circuit, and also enable an (i−1)unit circuit of the N unit circuits and an (i−2)unit circuit of the N−1 unit circuits. By performing buffering and data storage in parallel, propagation delays in the SAR logic circuit may advantageously be reduced, and thus, conversion time of a successive-approximation-register (SAR) analog-to-digital converter (ADC) may be advantageously reduced.