The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2020

Filed:

Oct. 09, 2017
Applicant:

Dialog Semiconductor (Uk) Limited, London, GB;

Inventors:

Daisuke Kobayashi, Tokyo, JP;

Soichiro Ohyama, Kanagawa, JP;

Assignee:
Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H02H 3/24 (2006.01); H03K 5/24 (2006.01); H02H 1/00 (2006.01); H02H 9/00 (2006.01); H02H 7/00 (2006.01);
U.S. Cl.
CPC ...
H03K 5/2472 (2013.01); H02H 1/0007 (2013.01); H02H 3/24 (2013.01); H02H 3/243 (2013.01); H02H 7/00 (2013.01); H02H 9/00 (2013.01); H03K 5/24 (2013.01);
Abstract

An under-voltage lockout (UVLO) circuit configured for indicating that an electronic device may be enabled and disabled based on threshold levels of a power supply voltage. The UVLO circuit has a non-differential comparator configured to have a fixed threshold voltage. A voltage divider having a first terminal connected to the power supply voltage and configured to adapt a compare signal applied to the non-differential comparator to be proportional the power supply voltage such that a desired threshold voltage for the power supply voltage causes the non-differential comparator to change its output state. The UVLO circuit has a hysteresis controller configured for adjusting the compare voltage such that the power supply voltage has at least two threshold voltages to cause the non-differential comparator to change states. The non-differential comparator comprises a flipped gate transistor with a gate-to-source threshold greater than a normally gated transistor.


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