The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2020

Filed:

Jul. 26, 2019
Applicants:

SK Hynix Inc., Icheon-si, KR;

Seoul National University R&db Foundation, Seoul, KR;

Inventors:

Jaewook Kim, Seoul, KR;

Mino Kim, Seoul, KR;

Suhwan Kim, Seoul, KR;

Deog-Kyoon Jeong, Seoul, KR;

Assignees:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K 3/017 (2006.01); H03K 5/06 (2006.01); H03K 5/135 (2006.01); H03K 21/02 (2006.01); H03K 5/26 (2006.01); H03K 5/00 (2006.01);
U.S. Cl.
CPC ...
H03K 3/017 (2013.01); H03K 5/06 (2013.01); H03K 5/135 (2013.01); H03K 5/26 (2013.01); H03K 21/02 (2013.01); H03K 2005/00156 (2013.01);
Abstract

In an embodiment, a duty cycle controller comprises a delay circuit configured to output the feedback clock signal by delaying an output clock signal combined from an input clock signal and a feedback clock signal by a predetermined delay time, wherein the delay circuit comprises a unit delay circuit configured to delay the output clock signal by a time less than the predetermined delay time and configured to delay the feedback clock signal by the predetermined delay time by letting the output clock signal pass the unit delay circuit as many as a predetermined loop count.


Find Patent Forward Citations

Loading…