The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Dec. 08, 2020

Filed:

Nov. 08, 2018
Applicant:

Cirrus Logic International Semiconductor Ltd., Edinburgh, GB;

Inventors:

Zhaohui He, Austin, TX (US);

Rahul Singh, Austin, TX (US);

Ruoxin Jiang, Austin, TX (US);

Assignee:

Cirrus Logic, Inc., Austin, TX (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H03F 3/21 (2006.01); H03F 3/217 (2006.01); H03F 3/45 (2006.01); H03F 3/187 (2006.01); H03F 1/02 (2006.01); H03F 1/32 (2006.01);
U.S. Cl.
CPC ...
H03F 3/2171 (2013.01); H03F 1/0205 (2013.01); H03F 1/0211 (2013.01); H03F 1/3205 (2013.01); H03F 1/3211 (2013.01); H03F 3/187 (2013.01); H03F 3/2173 (2013.01); H03F 3/45215 (2013.01); H03F 3/45475 (2013.01); H03F 3/45672 (2013.01); H03F 2200/03 (2013.01); H03F 2200/129 (2013.01); H03F 2200/135 (2013.01); H03F 2200/264 (2013.01); H03F 2200/267 (2013.01); H03F 2200/351 (2013.01); H03F 2200/462 (2013.01); H03F 2200/471 (2013.01); H03F 2203/45116 (2013.01); H03F 2203/45512 (2013.01); H03F 2203/45528 (2013.01);
Abstract

In a Class-D amplifier, first/second ratios and first/second RC time constants are sequentially matched by trimming. An integrator is coupled to differential first/second paths. The first/second ratios are of a feedback resistor to an input resistor in the first/second paths. R's of the first/second RC time constants are the resistors of the first/second matched ratios. C's of the first/second RC time constants are integrating capacitors in the first/second path. For each of multiple power rails, a ramp amplitude is determined based on a sensed voltage. Concurrently, the driver stage is switched from first to second power rails and quantizer switched from first to second ramp amplitudes to achieve constant combined quantizer/driver stage gain. Based on a sensed load current, an IR drop is determined for a respective output impedance of the driver stage and added to a loop filter output to compensate for the respective output impedance.


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