The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2020
Filed:
Jul. 24, 2019
Applicant:
Infineon Technologies Ag, Neubiberg, DE;
Inventors:
Hui Teng Wang, Johor, MY;
Swain Hong Yeo, Singapore, SG;
Assignee:
Infineon Technologies AG, Neubiberg, DE;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01L 25/065 (2006.01); H01L 23/495 (2006.01); H01L 23/31 (2006.01); H01L 23/367 (2006.01); H01L 25/00 (2006.01); H01L 21/78 (2006.01); H01L 21/56 (2006.01); H01L 21/48 (2006.01); H01L 23/00 (2006.01);
U.S. Cl.
CPC ...
H01L 25/0657 (2013.01); H01L 21/4825 (2013.01); H01L 21/561 (2013.01); H01L 21/565 (2013.01); H01L 21/568 (2013.01); H01L 21/78 (2013.01); H01L 23/3107 (2013.01); H01L 23/367 (2013.01); H01L 23/49503 (2013.01); H01L 23/49537 (2013.01); H01L 23/49568 (2013.01); H01L 23/49575 (2013.01); H01L 24/32 (2013.01); H01L 24/83 (2013.01); H01L 24/97 (2013.01); H01L 25/0652 (2013.01); H01L 25/50 (2013.01); H01L 23/49555 (2013.01); H01L 24/29 (2013.01); H01L 24/48 (2013.01); H01L 24/73 (2013.01); H01L 2224/2929 (2013.01); H01L 2224/29298 (2013.01); H01L 2224/32145 (2013.01); H01L 2224/32245 (2013.01); H01L 2224/48091 (2013.01); H01L 2224/48106 (2013.01); H01L 2224/48247 (2013.01); H01L 2224/73215 (2013.01); H01L 2224/73265 (2013.01); H01L 2224/8384 (2013.01); H01L 2224/8385 (2013.01); H01L 2224/83191 (2013.01); H01L 2224/83801 (2013.01); H01L 2225/0651 (2013.01); H01L 2225/06575 (2013.01); H01L 2225/06589 (2013.01); H01L 2924/00014 (2013.01); H01L 2924/181 (2013.01);
Abstract
A semiconductor package includes a second leadframe assembly stacked above a first leadframe assembly, each leadframe assembly including a die pad, a plurality of leads and a semiconductor die attached to the die pad and electrically connected to the leads. An electrically insulative spacer separates the first and the second leadframe assemblies from one another. A mold compound embeds part of the first leadframe assembly, part of the second leadframe assembly and the electrically insulative spacer.