The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2020
Filed:
Oct. 04, 2019
Applicant:
Rosemount Aerospace Inc., Burnsville, MN (US);
Inventors:
Roger Alan Backman, Minneapolis, MN (US);
David P. Potasek, Lakeville, MN (US);
Assignee:
Rosemount Aerospace Inc., Burnsville, MN (US);
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H01H 85/041 (2006.01); H01H 85/00 (2006.01); H01H 69/02 (2006.01); H01H 85/175 (2006.01);
U.S. Cl.
CPC ...
H01H 85/003 (2013.01); H01H 69/02 (2013.01); H01H 85/0411 (2013.01); H01H 85/175 (2013.01); H01H 2085/0414 (2013.01); H01H 2223/002 (2013.01); H01H 2223/044 (2013.01);
Abstract
A micro-fuse assembly includes a substrate, a number of thin-film micro-fuses on the substrate, and a topping wafer configured to sealingly engage to at least one of the substrate or the thin-film micro-fuses to define a cavity therebetween. The cavity is configured to encapsulate the thin-film micro-fuses within an inert environment sealed within the cavity. A method of encapsulating a micro-fuse assembly within an inert environment using a topping wafer is also disclosed.