The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Dec. 08, 2020
Filed:
Jul. 11, 2019
Intel Corporation, Santa Clara, CA (US);
Robert P. Adler, Santa Clara, CA (US);
Husnara Khan, Chandler, AZ (US);
Satish Venkatesan, San Jose, CA (US);
Ramamurthy Sunder, Palo Alto, CA (US);
Mukesh K. Mishra, San Jose, CA (US);
Bindu Lalitha, Hillsboro, CA (US);
Hassan M. Shehab, Santa Clara, CA (US);
Sandhya Seshadri, Chandler, AZ (US);
Dhrubajyoti Kalita, Santa Clara, CA (US);
Wendy Liu, Santa Clara, CA (US);
Hanumanth Bollineni, Santa Clara, CA (US);
Snehal Kharkar, Santa Clara, CA (US);
Intel Corpration, Santa Clara, CA (US);
Abstract
Methods and apparatus relating to subsystem-based System on Chip (SoC) integration are described. In one embodiment, logic circuitry determines one or more components of a subsystem. The subsystem supports an architectural feature to be implemented on a System on Chip (SoC) device. A first interface communicatively couples a first component of the subsystem to a first component of another subsystem. A second interface communicatively couples at least one component of the subsystem to at least one chassis component of the SoC device or communicatively couples the at least one component of the subsystem to at least one non-chassis component of the other subsystem. In an embodiment, components of the subsystem may be packaged such that the packaging generates a reusable collateral that allows for fast integration of all aspects of design in any SoC device with a compatible chassis prior to manufacture.